レジスタを甘く見ていたらついにSpartan3に収まらなくなった件
今まで無理やり押し込んでいたがついにオーバー
師曰く「大きすぎないか？」とのことなので
大きい原因を探ってみた
XILINXのサマリー
CPU全体
| Device Utilization Summary | ||||
| Logic Utilization | Used | Available | Utilization | Note(s) |
| Number of Slice Flip Flops | 1,056 | 3,840 | 27% | |
| Number of 4 input LUTs | 3,011 | 3,840 | 78% | |
| Logic Distribution | ||||
| Number of occupied Slices | 2,000 | 1,920 | 104% | |
| Number of Slices containing only | 1,968 | 2,000 | 98% | |
| related logic | ||||
| Number of Slices containing | 32 | 2,000 | 1% | |
| unrelated logic | ||||
| Total Number of 4 input LUTs | 3,046 | 3,840 | 79% | |
| Number used as logic | 3,011 | |||
| Number used as a route-thru | 35 | |||
| Number of bonded IOBs | 70 | 173 | 40% | |
| Number of Block RAMs | 8 | 12 | 66% | |
| Number of GCLKs | 1 | 8 | 12% | |
| Total equivalent gate count for design | 553,278 | |||
| Additional JTAG gate count for IOBs | 3,360 |
メモリとレジスタなどの記憶ブロック
| Device Utilization Summary | ||||
| Logic Utilization | Used | Available | Utilization | Note(s) |
| Number of Slice Flip Flops | 1,056 | 3,840 | 27% | |
| Number of 4 input LUTs | 1,933 | 3,840 | 50% | |
| Logic Distribution | ||||
| Number of occupied Slices | 1,459 | 1,920 | 75% | |
| Number of Slices containing only | 1,459 | 1,459 | 100% | |
| related logic | ||||
| Number of Slices containing | 0 | 1,459 | 0% | |
| unrelated logic | ||||
| Total Number of 4 input LUTs | 1,962 | 3,840 | 51% | |
| Number used as logic | 1,933 | |||
| Number used as a route-thru | 29 | |||
| Number of bonded IOBs | 238 | 173 | 137% | OVERMAPPED |
| IOB Flip Flops | 2 | |||
| Number of Block RAMs | 8 | 12 | 66% | |
| Number of GCLKs | 1 | 8 | 12% | |
| Total equivalent gate count for | 546,120 | |||
| design | ||||
| Additional JTAG gate count for IOBs | 11,424 |
32bitレジスタ×32本の部分
| Device Utilization Summary | ||||
| Logic Utilization | Used | Available | Utilization | Note(s) |
| Number of Slice Flip Flops | 1,024 | 3,840 | 26% | |
| Number of 4 input LUTs | 2,210 | 3,840 | 57% | |
| Logic Distribution | ||||
| Number of occupied Slices | 1,110 | 1,920 | 57% | |
| Number of Slices containing only | 1,110 | 1,110 | 100% | |
| related logic | ||||
| Number of Slices containing | 0 | 1,110 | 0% | |
| unrelated logic | ||||
| Total Number of 4 input LUTs | 2,210 | 3,840 | 57% | |
| Number of bonded IOBs | 154 | 173 | 89% | |
| Number of GCLKs | 1 | 8 | 12% | |
| Total equivalent gate count for design | 24,527 | |||
| Additional JTAG gate count for IOBs | 7,392 |
ということで
主な領域の使用はレジスタのようです。
まぁ32bit×32本で1024bitなので
それなりに大きいのだとは思っていましたが
レジスタをRAMに割り当てしないと無理そう
